Caravel User Project CI2409/CI2411 Counter with 7-seg output + Raybox-zero VGA demo

An earlier version of this was submitted to CI2409, and an upgraded version (newer raybox-zero code with some other general integration fixes) is intended to be submitted to CI2411.

The VGA IP is a simple 3D-like "ray caster" demo: Anton's raybox-zero.

The counter in this is mostly the same as https://github.com/jeffdi/ci2409_test. General features are:

• Simple 16-bit binary up-counter is the core of the design.
• GPIO[35:0] are all outputs, but actual set of outputs is selected by GPIO[36] (mode input).
• Via mode select between: 0. Counter's hex value is output as 4x 7seg digits, with count[7:0] available too.
  1. Counter's 16-bit binary value is output, plus lowest hex 7seg, and several debug signals.
• Polarity of the 7seg pattern (active-high or active-low) follows the input level on GPIO[37] (digit_pol)
• The counter value is internally looped back to LA[111:96]
• While held in reset, all outputs should tri-state (i.e. they are configured as BIDIRECTIONAL and their OEBs switch them to inputs).
• The counter value can be updated in firmware via a Wishbone write, i.e. a write to any register address in the range 0x30000000..0x30FFFFFF.
• Firmware can use LA to override either the full 'count' value (if using a write mask of 0xFFFF), or otherwise some masked pattern of bits within its next value.
• Firmware can use LA to override the design's clk, rst, and digit_pol input signals.
• Internal IRQs are available for: 0. Whenever counter hits 0.
  1. Whenever counter hits a value present on LA[15:0]
  2. Whenever the raybox-zero end-of-video-frame is hit (i.e. after register double-buffer deployment).

Refer to README for the standard Caravel User Project documentation which also applies to this example.

Output mode selection

IN[37] specifies what mode we are in, to determine how outputs behave. The following are common to both modes:

NOTE: This mode input on GPIO 37 can be overridden by LA[67].

Mode 0 outputs: full counter, 1 hex digit (7seg), some debug signals

Mode 1 outputs: 5 LSB of counter, 1 hex digit (7seg), raybox-zero VGA output