Wishbone Liquid Crystal Display Controller

ASIC implementation of WB LCD Controller in GF180

This is an implementation of a Wishbone LCD Controller for GFMPW-1. The implementation is solely for practical purposes to check the ASIC design flow in 180nm. The RTL used is from opencores.org, and this core has been implemented only on FPGA, according to the information on the website.

For more information please visit: https://opencores.org/projects/wb_lcd

Core overview

This core has been implemented and tested on FPGA. It utilizes a Wishbone Interface for data management and is designed to interact with various display controllers such as Hitachi HD44780, Sitronix ST7066U, KS0066U, and SMOS SED1278. The main frequency used is 50 MHz.

The Wishbone interface is controlled by the Wishbone Slave ports from Caravel, and the implemented core has only 7 outputs from Caravel to the LCD controller.