The project presents an implementation of SHA-1 and SHA-256 [validity used in encryption, decryption, and key generation] cryptographic algorithms on open-source ASIC implementation. The project, combined with a RISC-V processor, can be used to test post-quantum algorithms. The said crypto cores will be used to encrypt and decrypt data and generate pseudorandom number generation. The main focus will be on the time rate and security of key and data transfer.