This project implements a Convolutional Neural Network (CNN) accelerator on an ASIC. The design includes modules for managing weights and inputs, performing multiply-accumulate (MAC) operations, summing results with an adder tree, normalizing data, applying ReLU activation, and performing pooling operations. The project is integrated into a top-level wrapper (user_project_wrapper
) that interfaces with external pins and a Wishbone bus.
WeightBuffer
clk
(input): Clock signal.reset
(input): Reset signal.weight_data
(input): Weight data to be written.write_enable
(input): Write enable signal.write_addr
(input): Address to write weight data.weight_out
(output): Array of stored weights.LineBuffer
clk
(input): Clock signal.reset
(input): Reset signal.data_in
(input): Input data to be stored.write_enable
(input): Write enable signal.write_addr
(input): Address to write input data.read_addr
(input): Address to read input data.data_out
(output): Output data.MAC
a
(input): First operand.b
(input): Second operand.y
(output): Product of operands.MACArray
a
(input): Array of first operands.b
(input): Array of second operands.product
(output): Array of products.AdderTree
in0
to in7
(input): Input values.sum
(output): Sum of inputs.ConfigurableAdderTree
products
(input): Array of product values.sum_mode
(input): Mode select (0 for pointwise, 1 for depthwise).final_sum
(output): Array of final sums.Norm (removed from latest version)
data_in
(input): Input data.norm_param
(input): Normalization parameter.data_out
(output): Normalized data.ReLU
data_in
(input): Input data.data_out
(output): Activated data.Pooling
data_in0
to data_in3
(input): Input data values.data_out
(output): Pooled data.ControlFSM
clk
(input): Clock signal.reset
(input): Reset signal.start
(input): Start signal.norm_param
(input): Normalization parameter.weight_write_enable
, line_write_enable
, sum_mode
, weight_data
, weight_write_addr
, line_data
, line_write_addr
, norm_enable
, relu_enable
, pool_enable
(output): Control signals.done
(output): Done signal.CNN_Accelerator
clk
, reset
, weight_data
, weight_write_enable
, weight_write_addr
, line_data
, line_write_enable
, line_write_addr
, sum_mode
, norm_param
, norm_enable
, relu_enable
, pool_enable
(input): Control signals.result
(output): Result of the CNN operations.CNN_Accelerator_Top
ControlFSM
, WeightBuffer
, and CNN_Accelerator
modules.clk
, reset
, start
, norm_param
(input): Control signals.result
(output): Result of the CNN operations.done
(output): Done signal.user_project_wrapper
CNN_Accelerator_Top
into a wrapper that interfaces with external pins and a Wishbone bus.├── src
│ ├── WeightBuffer.v
│ ├── LineBuffer.v
│ ├── MAC.v
│ ├── MACArray.v
│ ├── AdderTree.v
│ ├── ConfigurableAdderTree.v
│ ├── Norm.v
│ ├── ReLU.v
│ ├── Pooling.v
│ ├── ControlFSM.v
│ ├── CNN_Accelerator.v
│ ├── CNN_Accelerator_Top.v
│ └── user_project_wrapper.v
├── tb
│ └── tb_CNN_Accelerator.sv
├── README.md
This README file provides an overview of the project, descriptions of each module, the file structure, and a sample testbench for verification. You can paste this directly into your GitHub repository's README.md file.
Generative AI, specifically ChatGPT-4, played a pivotal role in the design, verification, development, and debugging of the CNN Accelerator Project. Leveraging the capabilities of ChatGPT-4 provided several advantages, including accelerating the development process, ensuring accuracy, and enhancing the overall efficiency of the project.
Design and Development
Verification
Debugging and Fixing Code
To maximize the benefits of Generative AI in hardware design and development, consider the following steps:
Clear and Specific Prompts
Iterative Development
Code Review and Validation
Combining AI with Traditional Methods
Continuous Learning and Adaptation
By following these steps, you can effectively harness the power of Generative AI to streamline the design, verification, development, and debugging processes in hardware projects like the CNN Accelerator.