Files
README.md
leosoc-gfmpw-1
A simple dual-core SoC with true random number generators as payload.
- Two RV32I cores running in parallel
- 32 word direct-mapped instruction cache for each core
- 4kB of shared memory
- SPI flash controller
- 2 UARTs
- 1 GPIO controller (24 I/Os)
- 15 different TRNGs
It uses the foundry provided 512x8 SRAM macros.
True Random Number Generators
| #ring oscillators | #inverters per oscillator | macro width and height |
|---|---|---|
| 1 | 3 | 70 |
| 1 | 5 | 70 |
| 1 | 7 | 70 |
| 2 | 3 | 75 |
| 2 | 5 | 75 |
| 2 | 7 | 75 |
| 8 | 3 | 80 |
| 8 | 5 | 85 |
| 8 | 7 | 90 |
| 32 | 3 | 130 |
| 32 | 5 | 135 |
| 32 | 7 | 140 |
| 128 | 3 | 230 |
| 128 | 5 | 240 |
| 128 | 7 | 250 |
Memory Map
0x00000000RAM0x02000000Flash0x03000000UART00x04000000UART10x05000000GPIO00x06000000TRNG00x0F000000Blinky