Efabless Repositories
Code hosting system for your Efabless projects
All Projects 573
passant / LDOR1V8E
A test chip including three 3.3 V to 1.8 V, logic-controlled LDOs
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Updated a year ago
jdicorpo / 2309_test
The is a test project for CI 2309.
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Apache-2.0
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Updated a year ago
jeetsumanto123 / AI-RISCV-Timer
This is an AI-RISCV-TIMER generated using the generative AI technique.
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Apache-2.0
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Updated a year ago
urish / tinytapeout-04
Tiny Tapeout 04 Visit https://tinytapeout.com for more information on the project and how to get involved
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Apache-2.0
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Updated a year ago
erwannberlivet / Basics_for_Elektor
Integrated circuit basics files
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Updated a year ago
jdicorpo / test_mirror
this is a test for mirroring from another git repo
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Apache-2.0
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Updated a year ago
wrs225 / Caravel-Vector-Coprocessor-AI
This is our submission for the EFabless AI Generated Chip Design Competition. It features a wishbone-accessible vector co-processor with 6 vector register files and 6 scalar register files. It supports floating point, boolean, integer, and scalar operations. Additionally it supports conditional vector instructions with predicate registers.
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Apache-2.0
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Updated a year ago
noritsuna / Edge_Circuit_Designer
This project is an Edge AI execution environment for running Meta's LLaMa2 and Code LLaMa on a Raspberry Pi 4 with 64-bit OS to automatically generate verilog code.
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Apache-2.0
baungarten / AI_by_AI
CNN-based MNIST Classifier Integrated Circuit (IC) using ChatGPT-4
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Apache-2.0
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Updated a year ago
chipignite / caravel_user_project
Caravel User Project provides a template for implementing designs using Caravel compatible with chipIgnite.
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Apache-2.0
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Updated a year ago
liam / IMPACT_Custom_SRAM_01
IMPACT labs custom SRAM design, built from custom Magic and Xschem designs, to verify and validate design functionality.
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Apache-2.0
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Updated a year ago
markzakharov / MASC_AI_Synthesized_Cryptoprocessor
Group of researchers from UCSC are submitting a ChatGPT-4 designed and tested RISC-V 32-bit compliant crypto extension accelerator. All the designs and tests were written by ChatGPT-4 and were done in DSLX, a google-created High Level Synthesis language. DSLX uses a Rust-style syntax, making it easy for LLMs to understand given the wealth of...
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Apache-2.0
benisonpin / ISP_cteTWLCEO
Integrate the RISC-V & ISP pipeline
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Apache-2.0
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Updated a year ago
asmamohsin997 / CyberGuard-Fortifying_Tomorrows_data-AI_based
In the contemporary landscape of computing, where data is vital, safeguarding its integrity is paramount. However, modern computing systems are under constant threat from data injection attacks – a category of cyberattacks that seeks to compromise system integrity, manipulate data, and breach security defenses.
Data injection attacks, also...
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Apache-2.0
urish / tinytapeout-05
Tiny Tapeout 05 - Visit https://tinytapeout.com for more information on the project and how to get involved
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Updated a year ago
hadirkhan10 / openram-testchip-v4
A testchip containing multiple openram generated memories and testing infrastructure
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Apache-2.0
sbowles22 / Purdue-STARS-NEBULA
Nano Electronics Bringing Undergraduate Learning Ahead
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Apache-2.0
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Updated a year ago
jdicorpo / caravel_openframe_project
Example project demonstrating the use of caravel openframe.
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sbowles22 / Purdue-STARS-NEBULA-1
Nano Electronics Bringing Undergraduate Learning Ahead (NEBULA) is a project from the Purdue Semiconductor Training And Readiness for Semiconductors (STARS) program that contains 12 early undergrad student projects.
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Apache-2.0
yangd333 / RX-Receiver_Frontend
Simple RF Receiver front-end for WiFi 6 (5.925 GHz). Aims to improve linearity on LNA and Mixer.
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Apache-2.0
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Updated a year ago
salaheag / UNIC-CASS_precheck_AI_CORDIC_LIU
Description of the Design Idea:*
The COordinate Rotation DIgital Computer (CORDIC) is a multiplier-less and hardware friendly circuit processor that uses shift-add operations to compute mathematical operations such as trigonometric functions, division, square root, and others. CORDIC is of high interest in many application domains such as...
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jdicorpo / RX-Receiver_Frontend
Simple RF Receiver front-end for WiFi 6 (5.925 GHz). Aims to improve linearity on LNA and Mixer.
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Apache-2.0
vicenteramirezp / UNIC-CASS_precheck_BLE
We propose to design a Bluetooth Low-Energy (BLE) Transmitter consisting of a Class-B CMOS Digitally Controlled Oscillator (DCO) and a Class-D Power Amplifier (PA) with on-chip matching designed to deliver 0 dBm to a 50 Ω load at maximum drain efficiency. In order to simplify the design, the first iteration will not include a PLL, only an...
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juansebastianmoya7 / UNIC-CASS_precheck_PLL_Uniandes
We designed a PLL for BLE applications with a reference clock of 75MHz.
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trungnguyen0503fl / UNIC_CASS_precheck_LDO_ITA
A low voltage dropout regulator used for IoT applications
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raven_crown / UNIC-CASS_precheck_egd_top
Power-optimized Exponential Golomb Decoder for H.264 Video DecodingAs a team committed to enhancing video playback performance through this project, our efforts stem from a deep understanding of the challenges faced by camera and object detection algorithms. By delivering an open-source, high-performance solution, we aspire to empower...
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Updated a year ago
apaj / UNIC-CASS_precheck_dac
DAC designed at Faculty of Electrical Engineering, University of Banja Luka
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Apache-2.0
jljunior / UNIC-CASS_precheck_DPGA
The proposed circuit is a Digitally Programmable Gain Amplifier (DPGA) designed to amplify voltage signals with programmable gain options ranging from 1 V/V to 256 V/V. The main core is an OTA (Operational Transconductance Amplifier) Miller with an output buffer configured as an inverter amplifier. The key feature of the circuit is its...
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